PowerElecHub

Methods and sources

Last updated: 1 November 2026

Why this page exists

A calculator is only useful if you can tell how far to trust it. This page lists, tool by tool, what was actually done to check the numbers, which source each method follows, and where the checking stops. It is written from the test scripts and page texts in the site's source code, not from intentions.

Three kinds of check appear below. An automated test is part of the build and runs on every change. A one-time check was done when the page was written or corrected and is described on the tool page, but is not yet repeated automatically. A gap is something that has not been checked at all.

Automated tests

The code that computes the results is separate from the page layout, so it can be run outside the browser. Seven test scripts (npm test) call those functions with fixed inputs and compare the output with an independent value: a hand calculation, a closed-form result, a brute-force numerical sweep or a separate time-step simulation. A change that breaks any comparison fails the build and is not published.

The tolerances are stated in the scripts. Most closed-form identities are checked to 0.1 % or better; comparisons against a simulation use 0.1 % to 0.2 %; values read off an application note are compared to the digits the note prints.

Independent simulations

Where a closed-form formula exists, it is checked against a simulation that does not use it. For the DAB the formulas are compared with an exact piecewise-linear evaluation of the inductor current and with a separate brute-force time-step simulation. For the DC-link capacitor guide, the Kolar and Round RMS formula is compared with an ideal switching simulation of a three-phase inverter, with sine-triangle PWM and with space-vector PWM. For the LC filter, Erickson's damping optimum is compared with a numerical sweep of the output impedance.

Reproduced reference examples

Where a tool follows an application note that contains a worked design, the tool's defaults are set to that design and the results are compared with the note: TI U-165 (SLUA086) for the flyback, Unitrode U-134 (TI SLUA144) for the PFC control loop and TI SLVA255 for the RC snubber. The numbers are listed on each tool page, including where the tool differs from the note and why.

Calculator by calculator

For each calculator: what is checked, the sources the page follows, and what is not verified. Sources are copied from the tool pages.

Buck / Boost / Buck-Boost Power Stage

How it is checked

  • No automated test yet. The worked example on the page is produced by the same code as the calculator and has not been checked against an independent calculation in the repository.

Sources

No single source; standard textbook relations, written out on the tool page.

Not verified

  • No comparison with a circuit simulation or a measured converter.
  • Losses beyond the switch and diode drops are not modelled.

LLC Resonant Converter Calculator: Tank Design and Gain Curve

How it is checked

  • Automated: the peak gain K_max found by the design search is compared with a brute-force sweep of the FHA gain curve for Q from 0.05 to 0.8 and m from 2 to 25; the largest difference is below 0.1 %.
  • Automated: the m = 15 upper-limit flag and the ZVS check (magnetizing peak current n·V_o/(4·f_s·L_m) and the charge 2·C_oss·V_in) are checked against their formulas.

Sources

  • ST AN2644, "An introduction to LLC resonant half-bridge converter" (CD00174208).
  • Infineon, "Resonant LLC Converter: Operation and Design," application note, 2012.

Not verified

  • The calculator uses the first harmonic approximation. Its error below resonance and at light load has not been measured against a circuit simulation here.
  • The two application notes were not re-read line by line during the October 2026 review; the procedure was checked for internal consistency only.

DAB Converter Design

How it is checked

  • Automated: SPS and DPS closed forms are compared with an exact time-domain evaluator built from the piecewise-linear inductor current (agreement better than 1e-9 across a grid that includes M ≠ 1).
  • Automated: at arbitrary operating points, power, RMS current and peak current from the evaluator match a separate brute-force time-step simulation within 0.1 %.
  • Automated: SPS switching currents and ZVS boundaries are compared with equations 22, 23, 26 and 27 of Rodríguez et al. (2015); symmetry P(φ) = −P(−φ), monotonic power in φ, and the solvers (bisection, DPS and TPS optimizers) are tested.

Sources

  • R. W. De Doncker, D. M. Divan, M. H. Kheraluwala, IEEE Trans. Ind. Appl., vol. 27, no. 1, 1991.
  • H. Bai, C. Mi, IEEE Trans. Power Electron., vol. 23, no. 6, 2008.
  • B. Zhao, Q. Song, W. Liu, IEEE Trans. Power Electron., vol. 27, no. 9, 2012.
  • B. Zhao, Q. Song, W. Liu, Y. Sun, IEEE Trans. Power Electron., vol. 29, no. 8, 2014.
  • J. Huang, Y. Wang, Z. Li, W. Lei, IEEE Trans. Ind. Electron., vol. 63, no. 7, 2016.
  • F. Krismer, J. W. Kolar, IEEE Trans. Power Electron., vol. 27, no. 1, 2012.

Not verified

  • The DPS and TPS optimum is found numerically on a grid. It is not the closed-form solution of the cited TPS papers and has not been compared with their published curves.
  • Bai and Mi (2008) print DPS expressions that differ from the ones used here by a factor of two where D2 ≤ D1. The body of Zhao et al. (2012) has not been read to confirm which version it gives.
  • Ideal switches, a lossless inductor and no magnetizing current are assumed; dead time and the ZVS transition itself are not simulated.

CCM Boost PFC Design

How it is checked

  • No automated test yet. The worked example on the page (269 µH, 19.02 A inductor peak, 398 µF for ripple) is produced by the calculator's own code and has not been checked against an independent calculation in the repository.

Sources

No single source; standard textbook relations, written out on the tool page.

Not verified

  • Inductance roll-off with DC bias, high-frequency ripple in the RMS currents and controller behaviour are not included, as the page says.
  • No comparison with a switching simulation.

Flyback Converter Design

How it is checked

  • One-time check: with the inputs of TI U-165 (SLUA086) the tool returns D = 48.3 %, a 5.16 A peak, 2.74 A rms, 83 µH (80 µH in the note), a 19.4 V diode reverse voltage and a 25.8 A secondary peak, matching the note.
  • Automated: the U-165 results are printed by npm test, and the identity I_s,rms² − I_ripple² = I_out² is asserted for the default design.

Sources

  • TI application note U-165 (SLUA086).

Not verified

  • The U-165 numbers are printed but not yet asserted by the test, so a regression would be caught only by reading the output.
  • Clamp and leakage-energy results have not been compared with a simulation.

LLC Plant + PI Controller Bode Plot

How it is checked

  • Automated: the LLC voltage-loop lab recomputes phase and gain margins with the same plant, PI and delay as this tool, written separately in the test, and the two must agree.

Sources

No single source; standard textbook relations, written out on the tool page.

Not verified

  • The plant is FHA-based. Near and below resonance the real converter has extra poles that FHA misses; this has not been checked against an extended describing-function model or a measurement.

PFC Current and Voltage Loop

How it is checked

  • One-time check: the defaults are the 250 W example of Unitrode U-134. The note's equations are reproduced: amplifier gain 5.2, f_ci 15.9 kHz (15.7 kHz with R_cz rounded), C_cz ≈ 507 pF, V_o,pk = 1.84 V, G_va = 0.0326, f_vi = 19.1 Hz.
  • With the parts the note finally chose, the full loop gives 17.5 kHz with 46.7° and 14.9 Hz with 52.5°. The page explains the difference: the note's formulas are asymptotic.

Sources

  • P. C. Todd, Unitrode application note U-134 (TI SLUA144), UC3854 power factor correction design.

Not verified

  • The U-134 comparison is not part of npm test yet.
  • Feedforward ripple, cusp distortion and multiplier errors are not modelled.

Buck/Boost Type II / Type III Compensator

How it is checked

  • One-time check: the Type II and Type III part values follow Venable's k factor, and the resulting crossover and margins are shown from the full transfer function on the Bode plot, not from the k-factor approximation. There is no automated test for this tool yet.

Sources

  • H. D. Venable, k factor method (named on the page; no specific paper is cited).

Not verified

  • No automated test and no comparison with a published design example.
  • Averaged CCM model only; sampling effects and switch resistance are not included.

PID Controller Code Generator

How it is checked

  • Automated: every code style (C, the direct-access ISR and C2000 CLA styles, C++, Arduino) is generated for PI and PID, derivative on error and on measurement, with and without the derivative filter, anti-windup and feedforward, and compiled with a C compiler (syntax check). The Python output is executed with NumPy. 212 checks pass.

Sources

No single source; standard textbook relations, written out on the tool page.

Not verified

  • Compiling proves the code is valid, not that it behaves correctly on a particular microcontroller. The generated code has not been run on real hardware here.

PI Discretization Calculator (Tustin, Euler, ZOH)

How it is checked

  • Automated: Tustin, pre-warped Tustin, backward and forward Euler coefficients and the phase errors at the crossover are checked against fixed values.
  • One-time check: the same coefficients were compared with SciPy's cont2discrete when the tool was written.

Sources

  • G. F. Franklin, J. D. Powell, M. L. Workman, "Digital Control of Dynamic Systems," 3rd ed., Addison-Wesley, 1998.

Not verified

  • The SciPy comparison script is kept outside the site's repository and does not run with npm test.

Inrush Current Limiter Calculator: Resistor and NTC Sizing

How it is checked

  • Automated: for the three-phase example, energy per resistor (105.9 J) and peak power I_max²·R are checked; for the two-resistor arrangement the peak current I_max/2 and peak power (I_max/2)²·R are checked. The second case is a regression test for an error fixed in October 2026.

Sources

No single source; standard textbook relations, written out on the tool page.

Not verified

  • The NTC mode has no automated test.
  • The simulation ignores line and wiring impedance, as noted on the page.

Dead Time Calculator for MOSFET and IGBT Half-Bridges

How it is checked

  • Automated: the gate-charge method is checked against its formulas: Miller times R·Q_gd/V_gp and R·Q_gd/(V_drv − V_gp), the RC delays R·C·ln(12/5) and R·C·ln(12/9) in the example, and the rejection of V_drv ≤ V_gp.

Sources

  • onsemi AN-1090 (plateau gate current = (V_drv − V_gp)/R_g).
  • Vishay AN608A, "Power MOSFET Basics: Understanding Gate Charge and Using it to Assess Switching Performance."

Not verified

  • The datasheet and timer-register tabs have no automated test.
  • Results are not compared with a double-pulse or bench measurement; the page asks you to measure.

RC Snubber Calculator

How it is checked

  • One-time check: the TI SLVA255 example (217 MHz falling to about half with 300 pF) gives 100 pF, 5.38 nH and 7.33 Ω against the note's 100 pF, 5.4 nH and 7.3 Ω.
  • One-time check: in the ring-down simulation, R_s = Z0 with C_s ≫ C_p gives 16.4 % overshoot against 16.3 % expected for ζ = 0.5.

Sources

  • Texas Instruments application note SLVA255 (RC snubber for switch-node ringing).

Not verified

  • Neither check is part of npm test yet.

RC, RL and LC Filter Calculator: Cutoff, Step Response and Design

How it is checked

  • Automated: Erickson's optimum damping resistor and the predicted output-impedance peak are compared with a numerical sweep of |Z_o| for n = 1, 2, 4 and 8 (agreement within 0.001 %). Peaks with ESR and DCR, and with R_d halved or doubled, are also checked.

Sources

  • R. W. Erickson, D. Maksimović, "Fundamentals of Power Electronics," 2nd ed., Section 10.4.

Not verified

  • The RC, Sallen-Key and generated-code parts of the filter tool have no automated test.

MOSFET Loss Calculator (Conduction, Switching, Body Diode)

How it is checked

  • Automated: the page example (48 V to 12 V, 10 A, 200 kHz) is checked against a hand calculation of Q_gs2, the four switching intervals, turn-on and turn-off energy, C_oss, Q_rr and gate loss; the iterated junction temperature is compared with its closed-form solution.

Sources

  • D. Graovac, M. Pürschel, A. Kiep, "MOSFET Power Losses Calculation Using the Data-Sheet Parameters," Infineon, Application Note V1.1, 2006.

Not verified

  • The test checks that the code follows the formulas. It does not check the formulas against measured losses; the page gives ±50 % as a realistic range.
  • The Infineon note was used for the method; its full text has not been compared item by item with this implementation.

Heatsink and Thermal Resistance Calculator

How it is checked

  • One-time check (script, described on the page): the Foster sum at long times equals ΣR_i; the single-pulse rise P·Z_th(t_p) agrees with an RK4 integration of the RC network to six digits; the exact periodic peak agrees with 120 periods of time stepping.

Sources

  • Infineon application note AN2008-03 (thermal equivalent circuits, Foster and Cauer networks).

Not verified

  • The check script is not in the site's repository and does not run with npm test.

Capacitor Ripple Current and Lifetime Calculator

How it is checked

  • No automated test yet. The worked example (output capacitor of the PFC calculator's default design) is produced by the calculator's own code and has not been checked against an independent calculation in the repository.

Sources

  • Nippon Chemi-Con life formulas for radial and SMD aluminium electrolytic capacitors.
  • Rubycon approximation for the radiation constant.
  • KEMET and EPCOS (TDK) documentation for film capacitor hot spot.

Not verified

  • The defaults are example values, not data for a real series.
  • Snap-in and screw-terminal formulas are not implemented, as the page says.

Guides and visual labs

The DC-link capacitor guide uses the Kolar and Round formula for capacitor RMS current. npm test compares it with an ideal switching simulation for M = 0.5, 0.8 and 1 at φ = 0°, 30° and 60°, with sine-triangle PWM and space-vector PWM, and checks the guide's example (29.66 A rms, 38.18 A DC, 9.29 V mean ripple with 100 µF).

The buck, LLC and PMSM control labs and the LLC synchronous-rectifier timing chart each have a self-test: steady state with no disturbance, preset phase margins from the exact discrete loop, torque and current relations, and the condition that the rectifier current reaches zero exactly when there are no parasitics. These check that each model does what its page says, not that the model matches a particular product.

What is not verified, across the site

  • No calculator has been compared with measurements on a physical prototype as part of this site's checks.
  • Several cited sources have not been read in full: Kolar and Round (2006), the body of Zhao, Song and Liu (2012), and the full Graovac et al. note. The formulas taken from them are checked by simulation or hand calculation as described above, not against the original text.
  • The Chinese and Japanese pages were translated with AI assistance and have not been reviewed by a native-speaking engineer.
  • Tools marked "one-time check" above can drift if their code changes, until the check is moved into npm test.

Report an error

If a result looks wrong, send the inputs you used and what you expected. Confirmed errors are fixed and the change is dated on the tool page. Contact page