How it works
MOSFET losses split into terms that depend on different things. Conduction follows I_rms² and R_ds(on), and it grows with temperature. Switching loss follows V_ds, the current at the edge, and f_s. The calculator computes each term from datasheet values, so you can see which one to attack first.
Switching times come from the gate charge. During the Miller plateau the gate current is (V_drv − V_pl)/R_g at turn-on and V_pl/R_g at turn-off, and dividing Q_gd by it gives the voltage transition. The current transition uses the part of Q_gs between V_th and the plateau, estimated here as Q_gs·(V_pl − V_th)/V_pl.
The two positions in a half bridge behave very differently. The hard-switched FET takes the V·I crossing, the C_oss energy and the recovery charge of the opposite diode. The synchronous FET turns on and off with almost no voltage across it, so it sees conduction plus a short diode interval in each dead time. Its Q_rr and E_oss are still real losses, but they become heat in the other device. The calculator keeps those two apart, because only heat in this package sets this T_j.
R_ds(on) depends on T_j and T_j depends on the loss, so the result is iterated until it settles. The sweep repeats this at each frequency and marks where the frequency-dependent loss overtakes conduction.
Design procedure
- 1Enter the operating point at the worst case for losses. For a buck that is usually maximum current at maximum input voltage.
- 2Read Q_gs, Q_gd, V_pl and Q_rr from the datasheet at a voltage and current close to yours.
- 3Check the largest term. If it is conduction, a lower R_ds(on) helps. If it is switching, a lower R_ds(on) usually brings more gate charge and can make things worse.
- 4Lower R_g or f_s if switching dominates, and check ringing and dead time again after any R_g change.
- 5Trim dead time on the synchronous FET using the dead-time calculator, then use the thermal calculator for the real heatsink path.
- 6Confirm with a double-pulse test before trusting the switching numbers.
Formulas
- Conduction
- P_cond = I_rms² · R25 · (1 + α·(T_j − 25))
- Turn-on times
- Q_gs2 ≈ Q_gs·(V_pl − V_th)/V_pl; t_ri = R_g·Q_gs2/(V_drv − V_pl); t_fv = R_g·Q_gd/(V_drv − V_pl)
- Turn-off times
- t_rv = R_g·Q_gd/V_pl; t_fi = R_g·Q_gs2/V_pl
- Hard-switching loss
- P_sw = ½·V_ds·I_on·(t_ri + t_fv)·f_s + ½·V_ds·I_off·(t_rv + t_fi)·f_s
- Output capacitance
- P_oss = E_oss·f_s = ½·C_oss(er)·V_ds²·f_s
- Body diode
- P_D = V_f·(I_on + I_off)·t_dead·f_s; P_rr = Q_rr·V_ds·f_s
- Gate drive
- P_gate = Q_g·V_drv·f_s
- Junction temperature
- T_j = T_a + P(T_j)·R_thJA
Worked example
Take a 48 V to 12 V synchronous buck at 10 A with 3 A of ripple and 200 kHz, so D = 0.25. The device values are an illustrative 100 V FET, not a specific part: 5 mΩ at 25 °C, α = 0.4 %/K, Q_g 60 nC, Q_gs 18 nC, Q_gd 12 nC, V_th 3 V, V_pl 4.8 V, 10 V drive, 5 Ω, C_oss(er) 400 pF, V_f 0.9 V, Q_rr 60 nC, 60 ns dead time, 50 °C ambient and 20 K/W. The hard-switched FET has t_ri 6.5 ns, t_fv 11.5 ns, t_rv 12.5 ns and t_fi 7.0 ns. Turn-on costs 0.74 W, turn-off 1.08 W, C_oss 0.09 W and recovery 0.58 W, while conduction is only 0.17 W at 5.02 A rms. The total is 2.65 W and T_j is 102.9 °C. Switching passes conduction at about 11 kHz, and at 500 kHz the same part would reach 178 °C. The synchronous FET carries 8.69 A rms and conducts 0.44 W at T_j = 63.0 °C. Its diode adds 0.22 W in dead time and causes 0.58 W of recovery loss in the other FET. That is 0.79 W from the body diode against 0.44 W from the channel, which is more than most people expect from a device that is supposed to be the efficient one.
Common mistakes
- Using R_ds(on) at 25 °C for the thermal design. At a 100 °C junction this part is about 30 % higher.
- Reading R_thJA from the datasheet as if it applied to your board. It is measured on a specified test board; a thermal measurement or a proper heatsink chain replaces it.
- Leaving out Q_rr. In this example recovery costs more than the hard-switched FET loses in conduction.
- Using Q_oss·V instead of E_oss with non-linear C_oss without noticing. The two differ, and superjunction parts differ the most.
- Treating these switching times as accurate. They ignore source inductance, gate-loop ringing and the change of Q_gd with V_ds.
Frequently asked questions
How accurate is the switching loss?
Treat it as ±50 %. Gate-charge estimates ignore package and layout inductance, and datasheet Q_gd is measured at one voltage and current. The result is good for comparing parts and finding the main term. A double-pulse measurement gives the actual energy.
Why is the synchronous FET’s switching loss zero?
Its body diode is already conducting when the channel turns on, and it takes over the current when the channel turns off. The voltage across the device is only about a volt during these edges, so the V·I crossing is negligible. The losses tied to it are diode conduction, recovery and C_oss.
Where does the Q_rr loss go?
Mostly into the hard-switched FET, which has to supply the recovery charge while still holding much of the bus voltage. The diode takes a smaller part during its snap-off. The calculator charges all of Q_rr·V_ds·f_s to the hard-switched side, which is slightly conservative for that device and slightly optimistic for the synchronous FET.
What is the difference between C_oss(er) and C_oss(tr)?
C_oss(er) is the energy-related value, the constant capacitance that stores the same energy as the non-linear C_oss at a given voltage. C_oss(tr) is the time-related value that gives the same charge. Use the energy value for loss.
Does this cover SiC and GaN?
The structure carries over, but check each term. SiC body diodes have a higher V_f of around 3 to 4 V, which makes dead time more expensive. GaN has no Q_rr in the usual sense and conducts in reverse with a voltage that depends on the gate drive, so set V_f and Q_rr from its datasheet.
References
- D. Graovac, M. Pürschel, A. Kiep, "MOSFET Power Losses Calculation Using the Data-Sheet Parameters," Infineon Technologies, Application Note, V1.1, 2006.
Results are engineering estimates. Verify your design with datasheets, simulation and measurement.