How it works
In voltage mode the duty cycle drives an LC filter, so the plant carries a double pole at the LC resonance. Past that point the phase heads toward −180° within about a decade, and the ESR zero of the output capacitor is often the only thing pulling it back. A crossover well above the resonance therefore needs phase lift from the compensator, usually more than the 90° a Type II can supply.
The plant is the averaged CCM model with a PWM gain of 1/V_ramp. In a boost the resonance moves with D′ = V_in/V_out, and the inductor adds a right-half-plane zero at D′²R/L: it raises the gain like an ordinary zero but subtracts phase, so it puts a hard ceiling on the crossover frequency.
Venable's k factor turns two targets, crossover f_c and phase margin, into part values. The boost needed is PM − 90° − ∠Gvd at f_c. A Type II puts one zero at f_c/k and one pole at f_c·k; a Type III puts a double zero at f_c/√k and a double pole at f_c·√k. The mid-band gain is chosen so the loop magnitude is exactly 1 at f_c.
The bottom divider resistor sits at the op-amp's virtual ground, so it sets the DC output voltage but drops out of the AC loop gain; the network is referenced to R1 alone. After rounding to E24 resistors and E12 capacitors the loop is recomputed with the rounded parts, and those are the crossover and margins shown.
Design procedure
- 1Find the power-stage corners: the LC resonance f0 and its Q, the ESR zero, and for a boost the right-half-plane zero at the worst case (lowest V_in, highest load).
- 2Choose the crossover. For a buck, up to about f_s/10 and comfortably above f0; for a boost, below about one fifth of the right-half-plane zero.
- 3Read the plant gain and phase at f_c and compute the boost. Below 90° a Type II will do; from about 90° to 150° use a Type III; beyond that, lower f_c or the margin target.
- 4Pick R1 (a few kΩ to a few tens of kΩ keeps the capacitors practical and the op-amp lightly loaded), compute the parts with the k-factor equations, then set R_bias for the output voltage.
- 5Round to standard values, recheck crossover, phase margin and gain margin with the rounded parts, and repeat at the corners of input voltage and load.
Formulas
- Buck plant (control to output)
- Gvd = (V_in/V_ramp)·(1 + s·C·ESR) / (1 + s/(Q·ω0) + s²/ω0²), ω0 = 1/√(LC), Q = 1/(√(L/C)/R + DCR·√(C/L))
- Boost plant (control to output)
- Gvd = (V_out/(D′·V_ramp))·(1 − s·L/(D′²·R))·(1 + s·C·ESR) / (1 + s/(Q·ω0) + s²/ω0²), D′ = V_in/V_out, ω0 = D′/√(LC), Q = 1/(√(L/C)/(D′·R) + DCR·√(C/L)/D′)
- Required phase boost
- boost = PM − 90° − ∠Gvd(j·2π·f_c), G = 1 / |Gvd(j·2π·f_c)|
- Type II (Venable)
- k = tan(boost/2 + 45°); C2 = 1/(k·ω_c·R1·G), C1 = C2·(k² − 1), R2 = k/(ω_c·C1)
- Type III (Venable)
- k = tan²(boost/4 + 45°); C2 = 1/(ω_c·G·R1), C1 = C2·(k − 1), R2 = √k/(ω_c·C1), R3 = R1/(k − 1), C3 = 1/(ω_c·√k·R3)
- Bottom divider resistor
- R_bias = R1·V_ref / (V_out − V_ref)
Worked example
The default buck converts 12 V to 3.3 V at 10 W (R ≈ 1.09 Ω) with L = 4.7 µH, C = 100 µF, 5 mΩ ESR, f_s = 500 kHz and V_ramp = 1 V. Its LC resonance is 7.34 kHz with Q ≈ 5.0. At f_c = 50 kHz the plant is −11.5 dB at −169.4°, so a 60° margin needs 139.4° of boost, which rules out a Type II. A Type III with k ≈ 31.1 puts the zeros at 8.96 kHz and the poles at 279 kHz. With R1 = 10 kΩ the network is R2 ≈ 6.92 kΩ, R3 ≈ 332 Ω, C1 ≈ 2.57 nF, C2 ≈ 85.2 pF and C3 ≈ 1.72 nF. Rounded to 6.8 kΩ, 330 Ω, 2.7 nF, 82 pF and 1.8 nF, the loop crosses at 51.3 kHz with a 61.0° phase margin. For V_ref = 0.8 V the bottom resistor is 3.2 kΩ.
Common mistakes
- Designing at nominal input only. The buck plant gain scales with V_in, so the crossover moves across the input range unless the controller has voltage feedforward.
- Counting on the ESR zero without checking the capacitor. Ceramic capacitors have milliohms of ESR, which pushes that zero far above the crossover where it gives no useful phase.
- Ignoring the op-amp's gain-bandwidth. Near the compensator poles the required gain must stay well below the error amplifier's open-loop gain, or the real response falls short of the design.
- Pushing a boost crossover toward the right-half-plane zero. The phase it removes cannot be compensated, and the zero moves lower at low line and full load.
Frequently asked questions
Why does a voltage-mode buck usually need a Type III?
Above the LC resonance the plant phase approaches −180°, so reaching a 60° margin takes well over 90° of boost unless the ESR zero sits near the crossover. A Type II cannot add 90° or more. With electrolytic capacitors whose ESR zero falls below the crossover, a Type II can be enough; with ceramics it rarely is.
How high can the crossover go on a boost?
The right-half-plane zero at D′²R/L adds gain while taking away phase, and no compensator can cancel it. Keep f_c below roughly one fifth of that frequency, evaluated at the lowest input voltage and the heaviest load, where the zero is lowest.
Why is the bottom divider resistor not part of the loop gain?
With an op-amp error amplifier the inverting input is held at V_ref, so no AC signal appears across the bottom resistor. The AC gain is the feedback impedance divided by the input impedance seen from V_out: R1, or R1 in parallel with R3 + C3. A transconductance amplifier behaves differently, because there the divider ratio does enter the loop.
What does V_ramp do?
The PWM comparator turns the control voltage into duty cycle with a gain of 1/V_ramp, so the plant gain scales directly with it. Take the ramp amplitude from the controller datasheet. Controllers with input-voltage feedforward scale the ramp with V_in, which keeps the buck loop gain constant across the input range.
Results are engineering estimates. Verify your design with datasheets, simulation and measurement.