How it works
An LLC converter regulates its output voltage by changing the switching frequency, so the voltage loop compensator outputs a frequency command rather than a duty cycle. Above resonance, raising the frequency lowers the output voltage, which means the plant gain is negative and the controller must act on the inverted error.
This tool first finds the operating point with the first harmonic approximation (FHA): it computes the resonant frequency, the inductance ratio m and the quality factor Q from your component values and load, then searches the inductive side of the gain curve for the switching frequency that gives the required voltage gain. The slope of the gain curve there is the low-frequency plant gain dV_out/df_s.
The small-signal plant combines that slope with the output capacitor and load (a single pole at 1/(2π·R·C_o)) and the ESR zero. A pure delay models sampling and computation in a digital controller. An optional double pole at the beat frequency |f_s − f_r| approximates the resonant tank dynamics that appear near resonance.
Auto-tune solves for the PI gains that put the crossover at your target frequency with the requested phase margin. The sliders then let you scale Kp and Ki and watch how the loop gain, margins and step response respond, which is the quickest way to build intuition for compensator design.
Design procedure
- 1Start from the small-signal plant: how much the output voltage changes per hertz of switching frequency at your operating point. The sign is negative above resonance, because raising the frequency lowers the gain.
- 2Choose a crossover frequency well below the switching frequency, commonly one tenth to one twentieth of it, and below any output filter resonance.
- 3Place the PI zero below the crossover so the controller adds gain at low frequency without eating too much phase at crossover.
- 4Check phase margin (aim for 45° to 60°) and gain margin (aim for 6 dB or more), then look at the closed-loop step response for overshoot and settling time.
- 5Repeat at the corners of the operating range (minimum and maximum input voltage, light and full load), because the plant gain of an LLC changes strongly with the operating point.
Formulas
- FHA voltage gain
- K = (m−1)·F² / √((m·F² − 1)² + F²·(F² − 1)²·(m − 1)²·Q²)
- Plant (small-signal)
- G_vf(s) = K_f · (1 + s·ESR·C_o) / (1 + s·(R + ESR)·C_o)
- Plant gain at the operating point
- K_f = (V_in,eff / n) · dK/dF / f_r
- PI controller
- C(s) = Kp + Ki / s
- Loop gain
- T(s) = C(s) · G_vf(s) · H · e^(−s·T_d)
- Auto-tune (at ω_c)
- φ_C = −180° + PM − ∠P(jω_c), Kp = cos φ_C / |P(jω_c)|, Ki = Kp·ω_c·tan(−φ_C)
Worked example
The default design is a 390 V half-bridge LLC delivering 48 V / 500 W with n = 4, Lr = 38 µH, Cr = 66.6 nF and Lm = 190 µH (f_r ≈ 100 kHz, m = 6, Q ≈ 0.40). It operates at about 104 kHz, where the plant gain is roughly −0.18 mV/Hz. With 1000 µF output capacitance, a 2.5 V sense divider and 15 µs control delay, auto-tuning for a 2 kHz crossover and 60° phase margin gives about 13.6 dB of gain margin and a step response with roughly 24% overshoot.
Common mistakes
- Tuning at one operating point only. A loop that is stable at full load can oscillate at light load where the LLC gain slope is steeper.
- Ignoring the sampling and computation delay of a digital controller, which removes phase near crossover.
- Forgetting the sign of the plant. The PI output must decrease the frequency when the output voltage is too low.
- Setting the crossover close to the switching frequency, where the averaged small-signal model is no longer valid.
Frequently asked questions
Why is the controller output in Hz instead of duty cycle?
An LLC converter controls power flow with switching frequency. The PI output is a frequency command, which the PWM peripheral converts into a switching period.
What crossover frequency should I choose?
Voltage loops commonly cross over at a few hundred hertz to a few kilohertz, well below the switching frequency and below the beat frequency between switching and resonant frequency. Higher crossover gives faster transients but leaves less margin against unmodeled dynamics.
How accurate is the FHA plant model?
It captures the DC gain and the output filter pole well, which is enough for a first PI design. Near and below resonance the LLC has extra poles that FHA misses, so confirm the loop with an extended describing function model, simulation or a network-analyzer measurement.
What phase margin is enough?
Aim for at least 45°, and 60° for a well-damped response. Keep at least 6 dB of gain margin.
Results are engineering estimates. Verify your design with datasheets, simulation and measurement.