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LLC Voltage Loop Lab: Tune the PI and Watch the Operating Point Move

This lab closes a PI voltage loop around an LLC converter and lets you change it while it runs. The controller output is a switching-frequency command. The tank turns that frequency into gain, and the gain curve itself moves when the load or the input voltage changes. The red dot on the gain plot is the converter's operating point; press Play and it follows the simulated transient.

Scenarios

PI controller (output = frequency command)

5.56e6 Hz/V
1.09e10 Hz/(V·s)
15 µs

The reference gains give 2 kHz crossover and 60° phase margin at 500 W and 390 V. Kp and Ki are in Hz of switching frequency per volt at the sensed (2.5 V) feedback node.

Disturbance at 10 % of the window

100 % (500 W)
50 % (250 W)
390 V
390 V

Limits and model

55 kHz
Speedt = 0.50 ms

Before the step · f_s = 104.1 kHz, f_s/f_r = 1.040, gain K = 0.985, v_out = 48.000 V

Gain needed for 48 V: 0.985 before, 0.985 after. The operating point sits where the active curve reaches that gain.

Crossover (before)
2000 Hz
Phase margin (before)
60.0°
Gain margin (before)
7.8 dB
Phase margin (after)
63.2° @ 918 Hz
Peak deviation
+220 mV
Recovery to ±0.2 %
0.13 ms
Starting f_s
104.1 kHz
f_s range
101.0 – 172.5 kHz

Model: 390 V half-bridge LLC, 48 V / 500 W, n = 4, L_r = 38 µH, C_r = 66.6 nF, L_m = 190 µH, C_o = 1000 µF (20 mΩ ESR), the same design as the LLC loop calculator. The tank is represented by its first-harmonic gain curve and an optional beat-frequency double pole; there is no switching ripple, no synchronous rectifier behavior, no losses and no optocoupler. Margins are computed from the linearized loop at the operating points before and after the step.

What is being simulated

At every time step the controller computes a frequency, the gain curve for the present load gives the tank gain at that frequency, and that gain times the input voltage divided by the turns ratio sets the current pushed into the output capacitor. The capacitor, its ESR and the load resistor do the rest. Linearize this around an operating point and you get the same small-signal plant the LLC loop calculator uses, which is why the phase margin shown here matches that tool for the same design and gains.

The tank does not change its output instantly when the frequency changes. The lab approximates that envelope delay with a double pole at the beat frequency |f_s − f_r| (at least 5 % of f_r), the same simplification the LLC loop calculator offers. The beat-frequency idea comes from extended describing-function analysis of resonant converters; a single fixed double pole is only a rough stand-in for it, so treat the exact ringing as indicative. Turn the option off to see the loop with an ideal tank.

Why the plant gain is negative

On the right side of the gain peak, raising the frequency lowers the gain. If the output is too low the controller must reduce the frequency. The PI here works on the error as usual and then flips the sign before adding it to the starting frequency, which is the same as giving the plant a negative gain. Watch the frequency plot in the rated-load scenario: when the load drops and the output rises, the frequency jumps up.

Exactly at resonance (f_s/f_r = 1) every load curve passes through a gain of 1. With a 390 V input and n = 4 the converter needs a gain of 0.985, so it runs just above resonance, where the curves for different loads are almost on top of each other. That is why a load step at nominal input disturbs the output only briefly: once the tank's envelope catches up, nearly the same frequency gives 48 V again.

Why the loop is slow at light load

At light load the gain curves flatten above resonance, so a change in frequency changes the output much less. The slope dV_out/df_s sets the plant gain. With the reference gains, the crossover falls from 2 kHz at 500 W to roughly 220 Hz at 10 % load and 400 V, and the phase margin drops to about 36°. Try the light-load scenario with a 50 ms window and compare it with the rated case.

The usual fixes are gain scheduling, a feedforward term from the input voltage, or burst mode at very light load. The lab does not include burst mode.

The capacitive region and the frequency clamp

Lower the input voltage and the required gain rises, so the operating point climbs the curve toward its peak. Add an overload and the peak itself gets lower. If a transient pushes the frequency below the peak, the slope reverses: lowering the frequency now lowers the output, the controller pushes further in the wrong direction, and the bridge loses zero-voltage switching. The simulation stops at that moment and says why.

Real LLC controllers prevent this with a minimum-frequency clamp set above the peak of the worst-case curve (heaviest load at the lowest input), often together with overcurrent protection. Turn the clamp on and set it below the peak to see that a badly placed clamp does not help.

Things to try

Raise Kp and Ki together by about a factor of three and step the load from 60 % to 100 %. The phase margin at full load goes negative, and the output and frequency oscillate until the clamp limits them. Raise the delay from 15 µs to 40 µs and watch the margin shrink at the same gains. Then press Re-tune at a light-load operating point and step back to full load to see why tuning at a single point is not enough.

For the frequency-domain view of the same loop, use the LLC PI loop calculator; for the tank itself, the LLC design calculator. The guides on the LLC voltage loop and the LLC gain curve explain the background. References: B. Yang, F. C. Lee et al., 'LLC resonant converter for front end DC/DC conversion', IEEE APEC 2002; S. Abdel-Rahman, 'Resonant LLC Converter: Operation and Design', Infineon application note AN 2012-09.

The animation follows the equations stated on this page. Conventions differ between textbooks and software libraries; check the one your code uses before comparing numbers.