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PWM Methods Compared: SPWM, THI, SVPWM, DPWM and Six-Step

Sine-triangle PWM, third-harmonic injection, space vector PWM and the discontinuous methods look like different techniques, but for a three-phase inverter they are one idea with different choices. This page puts them side by side: the modulating waves, the clamped phases, the voltage range, the switching losses and the harmonic distortion, all computed from the same definitions and checked numerically.

DPWM1: The phase k with the largest magnitude is clamped: v0 = sign(v_k)·V_dc/2 − v_k. The 60° clamps are centred on the voltage peaks.

Modulating signals and zero sequence over one electrical cycle
+V/20−V/20°90°180°270°360°

Solid: phase modulating signals v_x + v0 in units of V_dc/2. Dotted: zero sequence v0. Shaded: intervals where phase a is clamped to a rail.

One carrier period at the cursor
aclamped to + railbc
d_a, d_b, d_c
1.000, 0.499, 0.232
v0 / (V_dc/2)
0.154
Clamped phase
a

Switching-loss function against load power-factor angle

Switching loss is taken as proportional to the commutated phase current, the linear model used by Hava, Kerkman and Lipo. Continuous methods are 1 at every angle. DPWM0, DPWM1 and DPWM2 are drawn from closed forms derived from this model; dashed curves are numerical integrations. Closed forms and integration agree to 1e-14.

Line-voltage harmonic distortion (simulation)

WTHD = √Σ(V_n/n)² / V1 of the line-to-line voltage, harmonics up to eight times the carrier ratio, symmetric regular sampling. Carrier ratio 42 for continuous methods; for DPWM 63 in the equal-switching comparison (the same number of transitions) and 42 in the equal-carrier one. DPWMMAX, DPWMMIN and DPWM2 lie on or very close to DPWM0.

Summary

MethodLinear rangeMax M (linear)Transitions per legCharacter
SPWMm ≤ 1.0000.7851Simplest; least voltage
THIPWM 1/6m ≤ 1.1550.9071Same range as SVPWM; needs a 3θ signal
SVPWMm ≤ 1.1550.9071General-purpose default
DPWMMINm ≤ 1.1550.9072/3Uneven stress: lower devices conduct more
DPWMMAXm ≤ 1.1550.9072/3Uneven stress: upper devices conduct more
DPWM0m ≤ 1.1550.9072/3Lowest loss near 30° leading
DPWM1m ≤ 1.1550.9072/3Lowest loss near unity power factor
DPWM2m ≤ 1.1550.9072/3Lowest loss near 30° lagging
DPWM3m ≤ 1.1550.9072/3Lowest loss of the family near ±90°
Six-step–1.0002 per cycleMaximum voltage; large 5th and 7th harmonics

m = V1,peak / (V_dc/2): SPWM reaches 1, every zero-sequence method 2/√3 ≈ 1.155, six-step 4/π ≈ 1.273. M = V1 / V1,six-step gives 0.785, 0.907 and 1. The SVPWM visual uses m_sv = (√3/2)·m, which is 1 at the same point as m = 2/√3 here.

One idea behind all of them

A three-phase load without a neutral connection responds only to the line-to-line voltages. Adding the same signal v0 to all three phase references therefore changes nothing for the load, yet it moves the pole voltages up or down. Choosing v0 decides how high the peaks go, whether a phase is clamped to a rail, how many switching transitions occur and how the ripple is distributed. Every method on this page is defined by its zero-sequence signal, following the classification of Hava, Kerkman and Lipo.

A note on names: in this context DSVM means discontinuous space vector modulation, the DPWM family below. The same abbreviation is also used for discrete space vector modulation in direct torque control, which is a different technique and is not covered here.

One index for all methods

The page uses m = V1,peak / (V_dc/2), the fundamental phase voltage relative to half the DC bus. Sine-triangle PWM is linear up to m = 1. Every method that adds a suitable zero sequence, including third-harmonic injection, SVPWM and all DPWM variants, is linear up to 2/√3 ≈ 1.155, because the line-to-line peak then just reaches V_dc. Six-step reaches 4/π ≈ 1.273 but is no longer PWM. The second index, M = V1 / V1,six-step, puts these at 0.785, 0.907 and 1.

Continuous methods: SPWM, third-harmonic injection, SVPWM

Sine-triangle PWM compares each phase reference with the carrier directly. It is the simplest and uses the least of the DC bus. Injecting a third harmonic of one sixth of the fundamental flattens the waveform peaks and extends the linear range to 2/√3. SVPWM reaches the same limit with v0 = −(v_max + v_min)/2, which needs only a comparison instead of a 3θ signal and gives the same switching pattern as symmetric space vector timing (see the SVPWM visual). In all three, every leg switches twice in every carrier period.

Discontinuous methods (DPWM, also called DSVM)

Discontinuous methods choose v0 so that one phase sits on a rail for 120° of each electrical cycle. That leg does not switch while it is clamped, so at the same carrier frequency there are one third fewer transitions; at the same average switching count the carrier can be raised by 1.5. The simulation confirms the 120° per phase for all six variants and a switching fraction of exactly 2/3.

How much switching loss this saves depends on where the clamp sits relative to the current. With losses proportional to the commutated current, DPWM1 reaches half the loss of continuous PWM at unity power factor, DPWM2 at 30° lagging and DPWM0 at 30° leading; DPWM3 is the best of the family near ±90°. DPWMMAX and DPWMMIN stress the upper and lower devices unequally. DPWM0, DPWM1 and DPWM2 are special cases of the generalized DPWM described by Hava, Kerkman and Lipo in 1998, which shifts the clamp with the power factor.

Six-step

Six-step drives each leg as a 180° square wave. The phase voltage fundamental is 4/π·V_dc/2, the most a two-level inverter can give. The price is low-order harmonics: the 5th, 7th, 11th and 13th appear with amplitudes V1/n, and the line voltage THD is about 31 %. Drives that need every volt at top speed move through overmodulation towards six-step and accept the extra current ripple and torque ripple there.

Harmonic quality

The distortion chart is a simulation, not a closed form. It uses the weighted THD of the line-to-line voltage, √Σ(V_n/n)² / V1, which tracks the current ripple in an inductive load. At equal carrier frequency the discontinuous methods are worse, because their clamped phases give up switching. At equal average switching frequency they come out ahead at high modulation: in this simulation above about m = 0.8 to 0.87, depending on the variant, while SVPWM remains better below. Third-harmonic injection is close to SVPWM, and SPWM is the worst at high modulation.

Which one to use

SVPWM, or the equivalent min–max injection, is the usual default: full linear range, simple to compute, good ripple across the whole range. DPWM is chosen when switching losses dominate and the inverter spends much of its time at high modulation, as in traction and other high-power drives; the variant should match the typical power factor, and a common arrangement is to switch back to SVPWM at low modulation, where DPWM's ripple is higher. Six-step is used only at the top of the speed range. Third-harmonic injection is mostly of historical interest in digital controllers.

References

D. G. Holmes and T. A. Lipo, Pulse Width Modulation for Power Converters: Principles and Practice, IEEE Press / Wiley, 2003.

A. M. Hava, R. J. Kerkman and T. A. Lipo, "Simple analytical and graphical methods for carrier-based PWM-VSI drives," IEEE Transactions on Power Electronics, vol. 14, no. 1, January 1999. DOI 10.1109/63.737592.

A. M. Hava, R. J. Kerkman and T. A. Lipo, "A high-performance generalized discontinuous PWM algorithm," IEEE Transactions on Industry Applications, 1998. DOI 10.1109/28.720446.

The zero-sequence definitions follow these papers. The switching-loss closed forms for DPWM0, DPWM1 and DPWM2 are derived on this page from the same linear loss model and checked against numerical integration; the distortion curves are this page's own simulation.

The animation follows the equations stated on this page. Conventions differ between textbooks and software libraries; check the one your code uses before comparing numbers.