Choosing the Clamp Voltage of a Flyback RCD Clamp
By the Power Electronics Hub editor · Published 2026-11-04
A 65 W adapter flyback runs from 90 to 264 V AC with a 19 V output and a 5.5:1 turns ratio, so the reflected voltage is about 107 V and the bus can reach 373 V at high line. The transformer has 500 µH of magnetizing inductance and 7.5 µH of leakage, 1.5 %, which is ordinary for a wound transformer. At low line the primary peak current is about 2.2 A at 65 kHz. The leakage alone carries ½·L_lk·I_pk²·f_s = 1.2 W into the clamp, but the clamp actually dissipates 2.4 W if you follow the usual advice of a clamp voltage twice the reflected voltage, and that choice already puts the drain at 588 V against a 650 V MOSFET.
Where the extra clamp loss comes from
When the MOSFET turns off, the leakage current has to fall from I_pk to zero before all of the magnetizing current can move to the secondary. During that interval the clamp capacitor holds the drain at V_in + V_clamp, the secondary winding holds V_or across the magnetizing inductance, and only the difference V_clamp − V_or is left to drive the leakage current down. The lower that difference, the longer the reset lasts, and for that whole time magnetizing current that should have gone to the output is flowing into the clamp instead.
- Clamp power
- P_clamp = ½ · L_lk · I_pk² · f_s · V_clamp / (V_clamp − V_or)
- Clamp ratio
- k = V_clamp / V_or → P_clamp = ½ · L_lk · I_pk² · f_s · k / (k − 1)
- Drain peak
- V_ds,pk = V_in,max + k · V_or (plus the clamp diode's forward-recovery overshoot)
- Clamp resistor and capacitor
- R_clamp = V_clamp² / P_clamp, C_clamp = 1 / (ΔV/V · R_clamp · f_s)
The factor k/(k − 1) is the whole story. At k = 2 the clamp burns twice the leakage energy, at k = 1.5 three times, at k = 1.25 five times. In the example that is 2.4 W, 3.6 W and 6.0 W, or 3.7 %, 5.6 % and 9.3 % of the output power. Above k = 2 the returns fall off quickly: k = 3 still costs 1.8 W.
The MOSFET sets the ceiling
Raising k lowers the loss but raises the drain voltage one-for-one with V_or. With 373 V at high line and 107 V reflected, k = 2 gives 588 V. A 650 V MOSFET derated to 90 % allows 585 V, so the largest clamp ratio it tolerates is about 1.97, which costs 2.44 W. The often-quoted range of 2 to 2.5 times the reflected voltage, from Fairchild's AN-4147, is simply out of reach with this transformer and this MOSFET.
There are two ways out, and both cost something elsewhere. An 800 V MOSFET gives room for k = 2.5 or more at the price of higher on-resistance or a bigger die. Or the reflected voltage comes down: at 5:1 instead of 5.5:1, V_or is 97.5 V and k = 2 lands at 568 V, but the low-line duty cycle and primary RMS current rise. Reducing the leakage itself, with interleaved windings, attacks the ½·L_lk·I_pk² term directly and is often the cheapest watt to save.
A fixed resistor lets the clamp voltage float
The clamp resistor is chosen once, at the design point: 214 V and 2.4 W give 19.1 kΩ, and 10 % ripple at 65 kHz asks for about 8 nF. But the RCD clamp has no voltage reference. The clamp voltage settles wherever V_clamp²/R equals the power the leakage pushes in, and that power depends on the peak current.
At high line the converter in this example runs in DCM with a slightly lower peak current, 2.13 A, so the clamp settles at about 209 V and the drain at about 582 V, just inside the limit. At half load the peak current is near 1.5 A and the clamp sits around 170 V; at 20 % load it drops to roughly 138 V, which is k ≈ 1.3. Down there the k/(k − 1) penalty is large again, and the resistor still dissipates V_clamp²/R ≈ 1 W while the output delivers 13 W. These light-load figures assume DCM with the same 88 % efficiency, so treat them as estimates.
This is why some designs replace the resistor with a TVS or Zener, or put one in series with a smaller resistor. A fixed clamp voltage keeps k from collapsing at light load, at the cost of a part that has to absorb the full clamp power at full load.
Getting L_lk and I_pk right
Measure leakage inductance from the primary with all secondary windings shorted, at a frequency near the switching frequency, and add whatever PCB loop inductance sits between the transformer and the MOSFET drain, because the clamp sees both. Use the highest peak current the controller allows, including current-limit overshoot during start-up or a load step, not just the steady full-load value. The flyback calculator on this site uses the same clamp equation, reports V_clamp, R, C and the reset time, and warns when the clamp loss exceeds 5 % of the output power.
Sources
- Fairchild Semiconductor, AN-4147 "Design Guidelines for RCD Snubber of Flyback Converters," Rev. 1.1.0, 2006 (clamp power equation, 2–2.5·nV_o recommendation, 5–10 % ripple).
- Numbers in this article were computed in Python from the equations above; the light-load clamp voltages assume DCM operation and are estimates.
This guide explains general engineering principles. Always verify your design with datasheets, simulation and measurement.